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Articles by A. Giray
Computer Science > Hardware Architecture
arXivLabs is a framework that allows collaborators to develop and share new arXiv features directly on our website. Both individuals and organizations that work with arXivLabs have embraced and accepted our values of openness, community, excellence, and user data privacy. arXiv is committed to these values and only works with partners that adhere to them. Have an idea for a project that will add value for arXiv's community? Learn more about arXivLabs.
Computer Science > Hardware Architecture
arXivLabs is a framework that allows collaborators to develop and share new arXiv features directly on our website. Both individuals and organizations that work with arXivLabs have embraced and accepted our values of openness, community, excellence, and user data privacy. arXiv is committed to these values and only works with partners that adhere to them. Have an idea for a project that will add value for arXiv's community? Learn more about arXivLabs.
[2510.15744] Cleaning up the Mess
arXivLabs is a framework that allows collaborators to develop and share new arXiv features directly on our website. Both individuals and organizations that work with arXivLabs have embraced and accepted our values of openness, community, excellence, and user data privacy. arXiv is committed to these values and only works with partners that adhere to them. Have an idea for a project that will add value for arXiv's community? Learn more about arXivLabs.
ColumnDisturb: Understanding Column-based Read Disturbance in Real DRAM Chips and Implications for Future Systems
arXivLabs is a framework that allows collaborators to develop and share new arXiv features directly on our website. Both individuals and organizations that work with arXivLabs have embraced and accepted our values of openness, community, excellence, and user data privacy. arXiv is committed to these values and only works with partners that adhere to them. Have an idea for a project that will add value for arXiv's community? Learn more about arXivLabs.
PuDHammer: Experimental Analysis of Read Disturbance Effects of Processing-using-DRAM in Real DRAM Chips
[Submitted on 15 Jun 2025] Title:PuDHammer: Experimental Analysis of Read Disturbance Effects of Processing-using-DRAM in Real DRAM Chips View a PDF of the paper titled PuDHammer: Experimental Analysis of Read Disturbance Effects of Processing-using-DRAM in Real DRAM Chips, by Ismail Emir Yuksel and 8 other authors View PDF Abstract:Processing-using-DRAM (PuD) is a promising paradigm for alleviating the data movement bottleneck using DRAM's massive internal parallelism and bandwidth to...
[2406.16153] RowPress Vulnerability in Modern DRAM Chips
arXiv:2406.16153 (cs) View PDF HTML (experimental) Comments: Subjects: Hardware Architecture (cs.AR); Cryptography and Security (cs.CR) Cite as: arXiv:2406.16153 [cs.AR] (or arXiv:2406.16153v1 [cs.AR] for this version) Submission history From: Haocong Luo [ view email] [v1] Sun, 23 Jun 2024 16:26:35 UTC (1,155 KB) Bibliographic Tools Bibliographic Explorer Toggle Bibliographic Explorer () Litmaps Toggle Litmaps (What is Litmaps?) scite.ai Toggle scite Smart Citations (What are Smart...
Simultaneous Many-Row Activation in Off-the-Shelf DRAM Chips: Experimental Characterization and Analysis
[Submitted on 9 May 2024] Title:Simultaneous Many-Row Activation in Off-the-Shelf DRAM Chips: Experimental Characterization and Analysis Authors:Ismail Emir Yuksel , Yahya Can Tugrul , F. Nisa Bostanci , Geraldo F. Oliveira , A.
[2404.11284] Amplifying Main Memory-Based Timing Covert and Side Channels using Processing-in-Memory Operations
[Submitted on 17 Apr 2024] Title:Amplifying Main Memory-Based Timing Covert and Side Channels using Processing-in-Memory Operations View a PDF of the paper titled Amplifying Main Memory-Based Timing Covert and Side Channels using Processing-in-Memory Operations, by Konstantinos Kanellopoulos and 8 other authors View PDF HTML (experimental) Abstract:The adoption of processing-in-memory (PiM) architectures has been gaining momentum because they provide high performance and low energy...
Ramulator 2.0: A Modern, Modular, and Extensible DRAM Simulator
arXivLabs is a framework that allows collaborators to develop and share new arXiv features directly on our website. Both individuals and organizations that work with arXivLabs have embraced and accepted our values of openness, community, excellence, and user data privacy. arXiv is committed to these values and only works with partners that adhere to them. Have an idea for a project that will add value for arXiv's community? Learn more about arXivLabs.
RowPress: Amplifying Read Disturbance in Modern DRAM Chips
arXivLabs is a framework that allows collaborators to develop and share new arXiv features directly on our website. Both individuals and organizations that work with arXivLabs have embraced and accepted our values of openness, community, excellence, and user data privacy. arXiv is committed to these values and only works with partners that adhere to them. Have an idea for a project that will add value for arXiv's community? Learn more about arXivLabs.
[2211.07613] Fundamentally Understanding and Solving RowHammer
[Submitted on 14 Nov 2022 ( v1 ), last revised 3 Feb 2023 (this version, v2)] Title:Fundamentally Understanding and Solving RowHammer Download a PDF of the paper titled Fundamentally Understanding and Solving RowHammer, by Onur Mutlu and Ataberk Olgun and A.
DRAM Bender: An Extensible and Versatile FPGA-based Infrastructure to Easily Test State-of-the-art DRAM Chips
arXivLabs is a framework that allows collaborators to develop and share new arXiv features directly on our website. Both individuals and organizations that work with arXivLabs have embraced and accepted our values of openness, community, excellence, and user data privacy. arXiv is committed to these values and only works with partners that adhere to them. Have an idea for a project that will add value for arXiv's community? Learn more about arXivLabs.
Self-Managing DRAM: A Low-Cost Framework for Enabling Autonomous and Efficient in-DRAM Operations
[Submitted on 27 Jul 2022 ( v1 ), last revised 16 Feb 2024 (this version, v5)] Title:Self-Managing DRAM: A Low-Cost Framework for Enabling Autonomous and Efficient in-DRAM Operations Download a PDF of the paper titled Self-Managing DRAM: A Low-Cost Framework for Enabling Autonomous and Efficient in-DRAM Operations, by Hasan Hassan and 4 other authors Download PDF HTML (experimental) Abstract:The memory controller is in charge of managing DRAM maintenance operations (e.g., refresh, RowHammer...
Sectored DRAM: A Practical Energy-Efficient and High-Performance Fine-Grained DRAM Architecture
[Submitted on 27 Jul 2022 ( v1 ), last revised 9 Jan 2024 (this version, v3)] Title:Sectored DRAM: A Practical Energy-Efficient and High-Performance Fine-Grained DRAM Architecture Download a PDF of the paper titled Sectored DRAM: A Practical Energy-Efficient and High-Performance Fine-Grained DRAM Architecture, by Ataberk Olgun and 8 other authors Download PDF HTML (experimental) Abstract:We propose Sectored DRAM, a new, low-overhead DRAM substrate that reduces wasted energy by enabling...
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