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Articles by Florian Kelber
Rapid and energy-efficient ultra-large library screening for drug discovery on a SpiNNaker2 neuromorphic chip
Abstract The virtual screening of make-on-demand small molecule libraries can prioritize drug candidates for rapid experimental validation to accelerate pre-clinical drug discovery. As ultra-large libraries grow to billions of compounds, exhaustive screening incurs prohibitive costs and energy consumption. We address this challenge with the neuromorphic SpiNNaker2 system, designed for massively parallel AI tasks.
SpiNNaker2: A Large-Scale Neuromorphic System for Event-Based and Asynchronous Machine Learning
Contributors Hector A.
OctopuScheduler: On-Chip DNN Scheduling on the SpiNNaker2 Neuromorphic MPSoC
We present OctopuScheduler, the first generalized on-chip scheduling framework for the accelerated inference of non-spiking deep neural networks (DNNs) on the neuromorphic hardware platform SpiNNaker2. The goal of OctopuScheduler is to flexibly support a wide variety of state-of-the-art DNN architectures for different domains, moving from an application-specific custom implementation to a generally applicable framework, simplifying the access to the SpiNNaker2 platform.
Fast Switching Serial and Parallel Paradigms of SNN Inference on Multi-Core Heterogeneous Neuromorphic Platform SpiNNaker2
Huang, J., Vogginger, B. , Kelber, F., Gonzalez, H., Knobloch, K. & Mayr, C. G., 2024 . Research output: Preprint/Documentation/Report › Preprint
CA-CFAR is Convolution: Fast Target Detection with Machine Learning Accelerator
In radar target detection, Constant False Alarm Rate is a commonly employed detector known for its simplicity and effectiveness. Its sliding-window detection mechanism possesses computational similarity to convolutional operations in machine learning. With the increasing emergence of AI-enhanced radar processing algorithms, systems at the edge tend to be equipped with machine learning accelerators to expedite matrix multiplications and convolutions.
A 16-Channel Fully Configurable Neural SoC With 1.52 μW/Ch Signal Acquisition, 2.79 μW/Ch Real-Time Spike Classifier, and 1.79 TOPS/W Deep Neural Network Accelerator in 22 nm FDSOI
Abstract External IDs PubMed 35025750 Keywords accelerator architectures, Biomedical electronics, biomedical signal processing, digital integrated circuits, energy efficiency, implantable devices, neural recording system, spike sorting, unsupervised learning
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