EDN: Voice of the Engineer

Advanced AI systems are forcing the semiconductor industry to rethink the boundary between silicon, package, board, power delivery, memory, cooling, and manufacturing. For several years, the dominant discussion has centered on advanced packaging capacity, high-bandwidth memory (HBM) integration, large interposers, organic substrate constraints, glass-core substrates, and scaling limits of 2.5D and 3D integration. That discussion remains valid. But a deeper system question is emerging.

Ones and zeroes: are clustered or spread out bits better? “It depends,” is the answer. Well, at least sorta. In the Comments section of a recent Design Idea for a DAC (Reference 1), one reader expressed a full-throated preference for an alternative to the common type of PWM used therein. For this “common” PWM, the ones in a repetitive cycle are “clustered” together, as are the zeroes.

Floating-point computations dominate the landscape of all AI/ML compute but also in automotive, avionics and healthcare. While performance and compute errors dominated the landscape of floating-point design and verification, power optimizations forced designers to use non-standard precisions such as FP4, FP8, BF16, and so on. So, mixed precision computation has become prominent in modern-day design. Figure 1 Here isa a sneak peek at floating point compute in AI designs.

Need just one more network port than you’ve currently got available (often: none)? A splitter can do the trick; just spend a few extra bucks to make sure you’ve made the right pick. I’ll begin this teardown with an analogy. Imagine you’re grilling weekend hamburgers for the family. After the patties are cooked (medium-rare, of course), you slot them in buns and load them up with per-recipient preferred extras—lettuce, pickles, tomatoes, onions, mustard, and the like.

In the world of retail, security is not always about cameras or guards; it’s often about technology you barely notice. Electronic article surveillance (EAS) tags are a prime example: small, lightweight devices that quietly safeguard billions of dollars’ worth of merchandise every year. Their strength lies in simplicity; an elegant mix of materials science and signal engineering that creates a reliable deterrent against theft.

Sometimes, getting true stress levels can be tricky because things happen that are sneaky. Stress analysis is often required to confirm that a designed product will perform properly in hazardous environments. Rather than trying to ascertain a “mean time between failures” (MTBF) or a “mean time to repair” (MTTR), the required assumption can also be that failure is simply unacceptable, no matter what, with the further assumption that repairs will simply not take place.

Just because generational device improvements aren’t in-your-face obvious doesn’t mean they aren’t sooner-or-later still tangibly impactful.

A 3D direct ToF LiDAR module, the VL53L9CX from STMicroelectronics offers 2.3k-zone resolution for low-compute edge AI systems. This compact all-in-one module integrates a SPAD array, post-processing SoC, two VCSELs, a BCD VCSEL driver, infrared filters, metasurface optical elements (MOEs), and PMIC. It enables high-resolution spatial awareness in robotics, industrial automation, smart buildings, and healthcare.

Qualcomm’s Snapdragon Reality Elite spatial computing processor delivers 48 TOPS of AI performance for video-see-through (VST) headsets and tethered optical-see-through (OST) glasses. The processor can run large vision models (LVMs) and large language models (LLMs) locally, reducing dependence on cloud-based processing for XR applications. Snapdragon Reality Elite supports photorealistic avatars using Gaussian Splatting, LLM-based agents, and real-time, LVM-driven object generation.

D-Wave Quantum has announced a gate-model quantum computing simulator for error-aware programming and algorithm development. The cloud-based simulator provides tools for modeling quantum processor behavior, error detection, and real-time control. It supports up to 21 qubits, ideal and hardware emulation modes, and integration with D-Wave’s Ocean SDK.