On June 25, 2026, IBM announced what it calls the world’s first sub-1-nanometer-node chip technology. The headline needs unpacking. The “0.7 nanometer” label is a technology-generation designation, not a claim that every critical physical feature on the device measures 0.7 nanometers. The important development is architectural: IBM’s NanoStack approach sequentially integrates complementary metal-oxide-semiconductor transistors in vertically stacked nanosheet layers.