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Articles by Brian Bailey
Intuition and AI
From Wikipedia: “Intuition is the ability to acquire knowledge without recourse to conscious reasoning or needing an explanation.
Hardware-Software Co-Design In The AI Era
Key Takeaways: Several hurdles must be overcome for a combined hardware/software development flow. Structurally, teams remain independent, use different tools and languages, and work at a different cadence. Technically, significant problems remain in enabling software to be executed virtually on hardware at different points in the development flow. AI is already proven to help in software development, and it is beginning to make inroads into hardware development.
Guest Commentary: The stigma of migraines needs to be taken seriously
Getting your Trinity Audio player ready... I’ve had migraines for 45 years, since I was just 5 years old. My earliest memories are of my parents helping me cope with severe attacks in kindergarten. Medicine had little to offer a child in that much pain back then, so doctors prescribed seizure medication and the associated bloodwork. More than 20 of those years since have been chronic, and the pain is daily now. The swing between bad days and better days is the only life I’ve known.
Trust, But Verify
We have to thank the Russians for the expression, ‘trust but verify’ (doveryai, no proveryai). Suzanne Massie, a scholar of Russian history, taught it to Ronald Reagan while he was president. He then used it to talk about nuclear disarmament discussions with the Soviet Union. Since then, it has been used extensively in many geopolitical contexts, especially those related to security, where you provide the carrot (we trust you), then the stick (no, we don’t).
From Spec To Formal Properties
Key Takeaways: Turning a specification into a set of properties is something that LLMs as capable of doing. However, most specifications are inadequate, AI tools are immature, and a large amount of human intervention is required. There are hidden dangers in blindly accepting the output of AI tools. Other methods must be used to assess completeness. The ROI is not clear. While a greater number of properties can be generated, the human cost of verifying them will see a significant increase.
Vertical Integration Becoming Pervasive
Key Takeaways: Hardware and software development has traditionally been disconnected, creating little opportunity to optimize system-level performance and energy consumption. Development swings between specialized and generalized solutions based on the rate of technology advancement. Energy and thermal concerns are forcing more companies to create specialized solutions even during a time of rapid change.
Invest In Junior Engineers
How many junior engineers can be replaced by AI, and how many AI agents can a senior engineer successfully manage? This seems to be a common theme these days, especially in the software development world where there are lots of freely available examples on which AI can be trained. Whether that can expand into embedded software is still somewhat uncertain. There are numerous reports about new graduates with computer science degrees not being able to find jobs.
The Impact Of AI Automation On Chip Design
Key Takeaways: Tools are currently built with a defined notion of how they will be used. For agentic solutions they will be transformed into collections of callable engines. Agents may be built by EDA companies for design houses or larger design houses may build their own, potentially transforming the EDA business model. The role of engineers will change, but exactly how is not certain. Agentic solutions are more than a wrapper on top of existing tools.
Change Is Tough
When I was actively involved in the creation of standards for the EDA and semiconductor industry, it was often joked that the great thing about standards is that there are plenty to choose from. According to the Internet, this quote can either be attributed to Grace Murray Hopper (an incredible pioneer in the development of modern programming languages and a rear admiral in the Navy), or Andrew S.
An AI Model Fit For Purpose
Key takeaways A model can only be used for its intended purpose, in a defined context, without taking unknown risks. Models must be created using a well-defined process and verified in a way that provides a level of independence. Deployment requires trust and a way to track the properties of the model. A model captures some kind of behavior exhibited in the real world, but all models are compromises. They sacrifice some detail for execution performance.
Verification Methodologies Struggle To Keep Up With AI
Key Takeaways: The rapid development of AI has resulted in new capabilities being provided to verification teams, beyond their ability to rationally insert them into accepted methodologies. There is a lot of uncertainty about who will benefit the most from this technology. Is AI a junior engineer replacement or an enhancer? The biggest benefits will come when AI helps engineers understand a larger context than is possible today.
Can AI Create Missing Models?
Key takeaways Models are an essential part of EDA flows, each capturing necessary detail while retaining good execution performance. Models have been expensive to create, maintain and verify, restricting their utilization, but AI may be able to significantly reduce their cost. A deeper question remains. Should AI be used to create models that help existing flows, or should AI be used to fundamentally replace them?
Disturbance In Verification
When writing my recent story about agentic verification, there was one quote from Abhi Kolpekwa, senior vice-president and general manager at Siemens EDA, that really struck a chord. He was talking about the additional token costs that would be consumed when a verification engineer starts asking the agents to do what was considered to be part of their job. “Consider the total cost of ownership,” he said.
Toward Agentic Verification
Key Takeaways: Agentic verification provides flow orchestration for common repetitive tasks. Capabilities will expand when tools can learn from a larger context, including the specification. Design houses need to fully understand the costs and benefits and plan accordingly. Agentic verification is more than a buzzword. It is a pivotal moment in the evolution of verification methodologies, and the transformation is just beginning.
Gates Add Functionality, But Wires Create Problems
Key takeaways: While transistors see continuous improvement, wires keep getting worse because of the smaller geometries and larger chip sizes. There are limited ways to avoid such problems, but the biggest impact will come from floorplanning. Analysis today is not adequate. New developments, such as backside power and 3D integration, provide temporary relief but new materials are a distant possibility.
Hardware From Specifications Using AI
There is a lot of excitement these days surrounding the idea that AI could make it possible to go from a specification to a design with absolutely no hardware skills. Well, get in line, because this is the umpteenth potential technology that was going to make that possible.
Creating Agentic EDA Methodologies
Key takeaways Agentic methodologies need to be able to reason across multiple data formats and abstractions. It is not clear how much data from previous designs is useful in new designs. Standards may help, but the lack of them may only impact cost. The relationship between tools and methodologies is bidirectional. Tools enable methodologies, and methodologies are dependent on tool features and the data they provide.
A New Era For Co-Processing
Key Takeaways: There is no single processor capable of executing everything efficiently, meaning that multiple processors are required. Maximum efficiency is gained by minimizing the movement of data. Architects must maximize efficiency for today’s workloads, while also adding enough flexibility to handle tomorrow’s. New processor architectures are rapidly evolving thanks to changing workloads associated with AI, but no one processor can do it all.
All Software Is Hardware-Dependent
I was lucky in my early career that I found two sets of great mentors. The first happened recently after graduating when I joined the Hilo development team. Members of that team included Phil Moorby, Simon Davdimann, Peter Flake, and others. They all had very different coding personalities, but most importantly, they worked as a team and used good foundational processes. One outcome of that was that the code was written from the ground up to be portable.
Memory Wall Gets Higher
Key Takeaways An increasing percentage of the chip area is consumed by the same amount of SRAM for each node shrink. The problem is not limited to leading-edge AI, as it will eventually impact even small MCUs and MPUs. Architectural changes may be required. Stacking SRAM chiplets on logic is possible but expensive.
AI Power on the Edge
Key takeaways Power and thermal become primary design considerations, not just optimizations. Hardware architectures need to be developed from the ground up. Hardware/software/model co-development is essential. Implementing AI on the edge is driven by a different set of metrics than training or even inference in the cloud. It makes power a first-class citizen, if not the most important design consideration, and it cannot be done successfully without co-design.
Follow The AI Leader
In the 1980s, a common expression was “nobody ever got fired for buying IBM.” It was considered the safe option, long after new technologies had emerged. While it may not have been the most advanced option available, it remained the safe bet. It had an established ecosystem, and it was a known quantity. But who or what is the safe bet when it comes to AI? Who has the necessary data? Who has the right people with the best knowledge and the ability to create good solutions? Who has the money?
Using Data And AI More Effectively In EDA
Key Takeaways The data being produced by EDA tools tends to be for human consumption and has weak semantics. Agents are attempting to create actionable information from unstructured data. The Model Context Protocol may provide AI with access to better data. Semiconductor design generates a lot of data, but how much of that is useful or currently being used by AI tools? And how much more productive could it be with different or more accessible data?
Minimum Energy Per Query
Key Takeaways Extracting heat from a chip faster is a short-term fix to a bigger problem. The longer-term challenge is how to reduce the amount of energy used per query. Data movement, guardbanding, and software inefficiency are key targets for the future. Heat is a serious problem within AI chips, and it is limiting how much processing can be done. The solution is either to extract heat faster, or generate less of it.
The Verification Conundrum
When constrained random test pattern generation became the de facto way to verify designs, reference models became necessary to check that a design was producing the correct output. These were often distributed across several models, such as checkers, scoreboards and assertions. Another model that had to be created was the coverage model. It was required because you had to know if a generated test was actually useful, and exercise some aspect of the design that had not been tested previously.
Does Your RISC-V Core Meet With The Standard?
Key Takeaways Architectural conformance and implementation verification are necessary but different for RISC-V designs, yet few verification engineers have experience on the conformance side. While RISC-V enables flexibility, there is a potential for ecosystem fragmentation.
Will 2026 Be Dominated By AI?
Many opportunities and problems became highly interlinked in 2025, fueled by the historic growth in everything AI. But how close are we coming to breaking points, and what are people doing to mitigate them? That is the story that will unfold this year. AI’s penetration into an increasing number of workloads is placing almost quadratic demands on compute, memory, interconnect, and the architectures that bind them.
2025 - A Year Of Change And Anticipation
2025 has certainly been a year of unexpected changes. These had a significant impact on the semiconductor industry and everything that supports it. Not all the changes have been bad, but flexibility has been a requirement for continued success or to make the most of an opportunity provided. Some industries, such as aerospace and defense, are seeing a significant boost around the world.
Tracking Your Preferences
I like to use my last blog of the year to focus on you, the reader. You provide valuable feedback to me and the rest of the team at Semiconductor Engineering. What do you want to see us write about? How in-depth should things be? This is always a balance between the amount of information provided and the rate at which readers tire with an article. My focus is the channels I write for – Systems & Design and Low Power – High Performance.
Limited by Power
AI is seen as a massive computation problem, but that is not the case, at least with the way that the problem is structured today. It is a data movement problem. This not only limits performance but represents most of the energy consumption. In addition, the industry spends most of its time and effort making small improvements that optimize aspects of the existing architecture, when what is really required are major changes to the way the problem is addressed. That is not in the cards today.
A Psychrometric Temperature Correction for the Positive Bias Observed in Stomatal Conductance Measured by the Open Flow‐Through LI‐600 Porometer
Conflicts of Interest The authors declare that they have no known competing financial interests or personal relationships that could have appeared to influence the work reported in this paper. Data Availability Statement The data that support the findings of this study are available from the corresponding author upon reasonable request.
AI Plays Multiple Roles Within EDA
AI’s infusion into our world may seem sudden and unexpected, but EDA has been quietly adopting it for more than a decade. What’s changed is that it’s now becoming more visible, thanks to increasingly powerful large language models (LLMs) and the need to apply them to increasingly challenging multi-physics problems. Two fundamental shifts underlie AI’s increasing prominence. First, heat is becoming a barrier for larger package sizes and higher integration levels.
Spray And Pray Wastes Power
For quite some time I have felt that the way the industry approaches power is less than optimal. Techniques such as clock gating and power gating have been used to reduce the amount of unnecessary activity and leakage, but is there more activity that does not contribute to an intended action? While unnecessary activity may be unimportant in the functional sense, it all represents power that is being wasted.
The Future For Formal Verification
Experts at the table: Semiconductor Engineering sat down to discuss possible future directions for formal verification technology with Ashish Darbari, CEO for Axiomise; Jin Zhang, product management group director for the Verification Group at Cadence; Sean Safarpour, executive director for R&D at Synopsys; and Jeremy Levitt, principal engineer for Digital Verification Technology at Siemens. What follows are excerpts from that discussion. Part 1 of this discussion is here, and Part 2 is here.
Noise: A Chip Killer
Noise has always been important to communications experts, but it’s quickly becoming an issue that every semiconductor designer has to contend with. Some chips already have been compromised. Noise can be defined as any deviation from the ideal that can impact intended functionality.
Formal Verification's Value Grows
Experts at the table: Semiconductor Engineering sat down to discuss why formal verification is becoming more important, with Ashish Darbari, CEO for Axiomise; Jin Zhang, product management group director for the Verification Group at Cadence; Sean Safarpour, executive director for R&D at Synopsys; and Jeremy Levitt, principal engineer for Digital Verification Technology at Siemens EDA. What follows are excerpts from that discussion. Part 1 of this discussion is here.
The Next Big Thing
Sometimes, we spend so much time looking for the next big thing that we actually miss something even bigger. I have to admit I was guilty of this while employed by a large EDA company 20 years ago. I was one of those ESL people — Electronic System Level acolytes, with Gary Smith as our standard bearer.
Advances In Formal Verification Technology
Experts at the table: Semiconductor Engineering sat down to discuss advances in formal verification tools and methodologies with Ashish Darbari, CEO for Axiomise; Jin Zhang, product management group director for the Verification Group at Cadence; Sean Safarpour, executive director for R&D at Synopsys; and Jeremy Levitt, principal engineer for Digital Verification Technology at Siemens EDA. What follows are excerpts from that discussion.
Current Problems Grow For Power Delivery
IR drop is becoming more problematic for a growing proportion of designs, an indication that the power delivery network (PDN) is not providing enough current to parts of the design when required. Unfortunately, there is no easy fix to this problem. In the past, when voltages were much higher, a small voltage droop didn’t really matter. At the same time, wires were much thicker and presented lower resistance. And finally, switching speeds were slower, creating smaller current spikes.
The Limits Of AI's Role In EDA Tools
The world has been inspired by generative AI models like ChatGPT. These are very applicable to things like copilots and agentic AI, but the adoption of these models into EDA tools is less obvious. What may be appropriate, and can AI make EDA tools faster or better? EDA has been enabling Moore’s Law for the past 40 years, and that has required pushing the limits of many of the algorithms and techniques that have been developed (see figure 1).
What Does Semiconductor Disruption Look Like?
When conducting interviews for my article on the incorporation of AI within EDA tools, Anand Thiruvengadam, senior director and head of AI product management at Synopsys, said, “AI has the potential to transform how customers do chip design. The entire EDA flow can be disrupted with AI.” He is not alone in making this kind of statement. Each year, I do a predictions piece, and I ask about how AI will disrupt EDA.
The Future Of Verification
Experts at the Table: Semiconductor Engineering sat down to discuss the state of functional verification with Mohan Dhene, director for architecture and design at Alphawave Semi; Andy Nightingale, vice president for product management and marketing at Arteris; Dinesha Rao, senior group director for software engineering at Cadence; Chris Mueth, new opportunities business manager at Keysight; Gordon Allan, director of verification IP products at Siemens EDA; and Frank Schirrmeister, executive...
New Demands For IP Reuse
Experts at the Table: Semiconductor Engineering sat down to discuss the state of functional verification with Mohan Dhene, director for architecture and design at Alphawave Semi; Andy Nightingale, vice president for product management and marketing at Arteris; Dinesha Rao, senior group director for software engineering at Cadence; Chris Mueth, new opportunities business manager at Keysight; Gordon Allan, director of verification IP products at Siemens EDA; and Frank Schirrmeister, executive...
The Demise Of Static Timing Verification?
The chip industry traditionally has relied on margins to help them mitigate timing problems, but an increasing array of factors are now influencing timing. Can static timing analysis evolve to address these problems? Static timing verification (STA) was a cornerstone technology for the acceptance of the register transfer level (RTL) abstraction. It showed that functionality would not be impacted by timing, so long as the longest combinatorial path would settle within the clock period.
AI Effort And Money Misplaced
While it is early days, and innovation is important, hyperscalers cannot afford to keep throwing money away forever. They need to work out how AI will earn money, and that relies on inference. For some time, I have been intrigued by the amount of money being spent on model development and AI training compared to the investment in inference. Models are an enabler, and every new model is attempting to open up some new capability, some new application.
Verification Fails To Keep Up
Experts at the table: Semiconductor Engineering sat down to discuss the state of functional verification with Mohan Dhene, director for architecture and design at Alphawave Semi; Andy Nightingale, vice president for product management and marketing at Arteris; Dinesha Rao, senior group director for software engineering at Cadence; Chris Mueth, new opportunities business manager at Keysight; Gordon Allan, director of verification IP products at Siemens EDA; and Frank Schirrmeister, executive...
Re-Architecting AI For Power
The industry is becoming increasingly concerned about the amount of power being consumed by AI, but there is no simple solution to the problem. It requires a deep understanding of the application, the software and hardware architectures at both the semiconductor and system levels, and how all of this is designed and implemented. Each piece plays a role in the total power consumed and the utility provided. That is the ultimate tradeoff that must be made.
Multi-Modal AI In EDA Development Flows
RTL coding is a critical step in the development of semiconductors, but many would argue it is not the most difficult. Things become a lot more complex as you get closer to implementation, and as the system context becomes larger than can be comprehended by text alone. In both cases, layout, timing, power, and many other factors come into play, but none is as easily represented by text, and they do not follow the same rules.
Hallucination And Innovation At DAC
At DAC this year, I had the pleasure of moderating an intimate chat between Alon Shtepel, senior director for ASIC at Micron, and Abhi Kolpekwar, vice president and general manager for digital verification technology at Siemens EDA. The assigned topic was generative AI in design and verification, with the more provocative subtitle asking if we are hallucinating or innovating? L-R: Brian Bailey, Alon Shtepel, Abhi Kolpekwar.
When Standards Enable Chiplets
Nobody wants standards until the lack of them inhibits the development of the solutions that they need. That is often too late.
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