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Articles by Gautam Singampalli
Next-Gen Memory Starts Here Cadence @ FMS
Next-Gen Memory Starts Here: Cadence at the Future of Memory and Storage FMS: the Future of Memory and Storage is fast approaching (August 5-7 at the Santa Clara Convention Center), and with it comes a unique opportunity to connect with some of the brightest minds in the semiconductor, memory, and storage industry. This premier event brings together industry experts, innovators, and leaders to highlight advancements shaping the future of memory and storage technology.
UALink™ 200G 1.0 Specification Overview
Learn more about the UALink Consortium here. Scaling up Using UALink Current standards fall short when it comes to scaling AI, which is precisely where Ultra Accelerator Link™ (UALink™) proves to be a transformative solution. UALink is an open standard designed to enable effective accelerator communications and expansion within a pod. It offers significant performance headroom to handle intensive workloads, making it ideal for AI applications.
UALink™ Shakes up the Scale-up AI Compute Landscape
Learn More About The UALink Consortium OCP Global Summit 2024 in San Jose, CA featured a slew of exciting announcements. The x86 Ecosystem Advisory Group stirred up much buzz. However, Kurtis Bowman and J Metz's standing room-only presentation on Ultra Accelerator Link™, a new standard, caught the industry's attention as it has the potential to shake up the semiconductor ecosystem for AI compute.
Cadence Demonstrates Complete PCIe 7.0 Solution at PCI-SIG DevCon ‘24
Cadence Demonstrates Complete PCIe 7.0 Solution at PCI-SIG DevCon ‘24 PCI-SIG DevCon 2024 – 32nd Anniversary For more than a decade, Cadence has been well-known in the industry for its strong commitment and support for PCIe technology. We recognize the importance of ensuring a robust PCIe ecosystem and appreciate the leadership PCI-SIG provides. To honor the 32nd anniversary of the PCI-SIG Developer’s Conference, Cadence is announcing a complete PCIe 7.0 IP solution for HPC/AI markets.
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