Jongun Won

1 Introduction Implementing neural networks in hardware offers the distinct advantage of parallel data processing with low power consumption, setting it apart from traditional computing systems.[1] Hardware-based neural networks can be categorized by their training method: off-chip and on-chip training.

2.2.1 Weight Update Figure 2b,c shows the weight update characteristics of a 6T1C single device measured with the PCB. Figure 2b shows the measured change of ADC value of a single cell, by applying four cycles of 1000 positive updates followed by 1000 negative updates.