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Roeland ter Hoeven

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Flexible constraint compilation in the parity architecture

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By Anette Messinger, Wolfgang Lechner, Roeland ter Hoeven
| Physical Review B
We present tools and methods to generalize parity compilation to digital quantum computing devices with arbitrary connectivity graphs and construct circuit implementations for the constraint Hamiltonian of higher-order constrained binary optimization problems. In particular, we show how even nonlocal constraints can be efficiently implemented without expensive SWAP gates.
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